REN Yunkun; CHEN Si; QIN Fei

doi:10.7498/aps.74.20241381

Abstract

Through-silicon via (TSV), as a key technology for realizing interconnections in three-dimensional integrated circuits (3D ICs), critically depends on the integrity of its sidewall interfaces to maintain optimal leakage characteristics. In this work, the temperature cycling experiments, incorporating leakage current I-V testing, microstructural observations are conducted, and the EDS elemental analysis is made to evaluate the effects of temperature cycling on the integrity of TSV sidewall interfaces and the leakage mechanisms in the insulation layer. The results indicate that as the number of temperature cycles increases, the alternating cyclic loads progressively degrade the integrity of the TSV barrier layer, transitioning from an intact interface to the formation of micro-voids and micro-cracks, which results in a significant increase in leakage current. When through-thickness cracks appear at the interface, a sudden decrease in leakage current occurs. The TSV failure mode is transforms from thermally induced leakage to mechanical cracking. The leakage mechanism of the insulation layer transforms from the Schottky emission mechanism (Cycle≤60) into a combination of Schottky emission and Poole-Frenkel emission mechanisms (Cycle≥90), and this transformation becomes more pronounced under high electric field conditions. Further analysis of TSV interface integrity reveals that thermomechanical stress induced by temperature cycling generates defects at the interface between the TSV copper fill and the barrier layer. As thermally induced defects accumulate, the barrier height of the insulation layer continuously decreases, making it easier for electrons in the metal to overcome the Schottky barrier under thermal and electric field excitation, thereby forming leakage currents. Moreover, these defects facilitate the diffusion of copper atoms into the insulation layer, thereby forming localized high electric field regions. These high-field regions in the insulation layer increase electron emission rates through the Poole-Frenkel emission mechanism, creating leakage paths. Therefore, copper diffusion emerges as one of the primary causes of dielectric performance degradation in the insulation layer.

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Corresponding author: CHEN Si, chensiceprei@yeah.net ; QIN Fei, qfei@bjut.edu.cn

Funds: Project supported by the National Natural Science Foundation of China (Grant No. 61804032).

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温循次数	0	30	60	90	120	150	180	210	240	270	300
Cu质量含量/%	9.19	9.22	12.55	18.07	27.44	33.59	37.16	41.98	44.19	48.29	15.85

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漏电机制	理论公式	拟合公式	参数说明
P-F发射	$ {J_{{\text{F-P}}}} = CE\exp \left( {\dfrac{{ - {\varphi _{\text{t}}} + q\sqrt {qE/4{\text{π}}{\varepsilon _0}{\varepsilon _{\text{r}}}} }}{{kT}}} \right) $	$ \mathrm{ln}\left(J_{\text{F-P}}/E\right)=A_{{\text{F-P}}}\sqrt{E}+B_{{\text{F-P}}} $	J 为电流密度 q 为电子电荷 E为电场强度 φ_t 为势陷深度 ε₀ 为真空介电常数 ε_r 为介电常数
肖特基发射	${J_{\text{S}}} = A{T^2}\exp \left( {\dfrac{{ - {\varphi _{\text{s}}} + q\sqrt {qE/4{\text{π}}{\varepsilon _0}{\varepsilon _{\text{r}}}} }}{{kT}}} \right)$	$ \mathrm{ln}J_{\text{S}}=A_{\text{S}}\sqrt{E}+B_{\text{S}} $	A 为有效理查德森常数 T 为绝对温度 φ_s 为肖特基势垒高度 k 为玻尔兹曼常数

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Vol. 74, Issue 5 - 2025-03-05

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