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Abstract

In recent years, the utilization of artificial intelligence and big data has led to the rise of compute-in-memory signal processing as the primary method for ADC design. Spintronic memory devices, which have non-volatile and low static power consumption characteristics, are particularly suitable for the design of low-power, high-bandwidth compute-in-memory ADCs. In this paper, a 3-bit magneto-elastic analog-to-digital converter (MEADC) is proposed, which comprises eight magnetic tunnel junctions (MTJs), where the MTJ free layer is a bicomponent multiferroic nanomagnet. The bicomponent multiferroic nanomagnet can attain deterministic magnetization switching under zero-field condition by regulating the strain-mediated voltage. It has been discovered that there is a linear correlation between the thickness of the piezoelectric layer and the critical flip voltage in a bicomponent multiferroic nanomagnet of a given size and material. Using this principle, the thickness of the piezoelectric layer is adjusted to allow the MEADC to have eight different voltage switching thresholds. This can make the analog signal converted into a combination of different magnetization states of eight multiferroic MTJ. A latch comparator and an independent read circuit are designed to detect the MTJ’s resistance state output a digital signal. Monte Carlo simulations indicate that the MEADC can achieve a 100% success rate of writing at room temperature. Additionally, the read circuit and write circuit are separated from each other, thus the same reference voltage can be set for each MTJ and result in higher readability. Micromagnetic simulation and numerical analysis demonstrate that the MEADC can operate at a maximum frequency of 250 MHz, and the energy consumption of a single conversion is only 20 aJ. Compared with the magnetic analog-to-digital converter based on the Racetrack technology, the energy consumption is reduced by 1000 times, and the sampling rate is increased by 10 times. The MEADC proposed in this paper offers an essential technical support for the spintronics-based compute-in-memory integrated circuit architecture.

Keywords:

magnetoelastic analog-to-digital converters/
magnetic tunnel junctions/
spintronics/
nanomagnets

Authors and contacts

Corresponding author:Yang Xiao-Kuo,yangxk0123@163.com

Funds:Project supported by the National Natural Science Foundation of China (Grant Nos. 62274183, 62301595) and the Natural Science Basic Research Plan in Shaanxi Province of China (Grant No. 2022JQ-073).

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References

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Cited By

DownLoad: Full-Size Img PowerPoint

参数	Tb_0.7Dy_0.3Fe₂	Ni
杨氏模量Y/(10¹⁰Pa)	8	21.4
磁致伸缩系数λ_s/10^–4	6.0	-0.2
吉尔伯特阻尼系数α	0.100	0.045
回磁比γ/(10⁵rad·s^–1·T^–1)	2.21	2.21
饱和磁化率M_s/(10⁵A·m^–1)	8.00	4.85
交换作用常数A/(10^–11J·m^–1)	0.90	1.05

DownLoad: CSV

V_write/mV	S_out7-0	Binary
0—8.53	00000000	000
8.53—9.38	00000001	001
9.38—10.24	00000011	010
10.24—11.09	00000111	011
11.09—11.95	00001111	100
11.95—12.80	00011111	101
12.80—13.66	00111111	110
13.66—14.51	01111111	111
14.51—	11111111	—

DownLoad: CSV

类型	分辨位数	最大转换频率	转换能耗
VCMA^[3]	3-bit	9 GHz	0.35 pJ
SHE-MTJ^[21]	3-bit	500 MHz	0.48 pJ
SHE-DWM^[4]	2-bit	1 GHz	0.079 pJ
CMOS^[22]	4-bit	20 MHz	5 pJ
Racetrack^[23]	8-bit	20 MHz	0.021 pJ
Dual-Bit MEADC^[24]	3-bit	667 MHz	0.17 pJ
本文MEADC	3-bit	1 GHz	20 aJ

DownLoad: CSV

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Vol. 73, Issue 13 - 2024-07-05

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