-
随着3D NAND闪存向更高层数堆叠, 后栅工艺下, 金属钨(W)栅字线(WL)层填充工艺面临的挑战进一步增大. 由于填充路径增长, 钨栅在沉积过程中易产生空洞, 造成含氟(F)副产物的聚集, 引起氟攻击问题. 具体表现为, 在后续高温制程的激发下, 含氟副产物向周围结构扩散, 侵蚀其周边氧化物层, 导致字线漏电, 影响器件的良率及可靠性. 本文首先分析了在3D NAND闪存中氟攻击的微观原理, 并提出了通过低压退火改善氟攻击问题的方法. 接下来对平面薄膜叠层与三维填充结构进行常压与低压下的退火实验, 并使用多种方法对残留氟元素的浓度与分布进行表征. 实验结果表明, 适当条件下的低压退火, 使得钨栅中的残余氟有效地被排出, 可以有效降低字线的漏电指数, 提高3D NAND闪存的质量.In this work, the influence of fluorine (F) erosion on tungsten (W) gate process is studied, and the measure to mitigate the word line (WL) leakage resulting from F erosion in 3D NAND flash memory is proposed. As the number of layers in 3D NAND increases, the tungsten (W) gate word line (WL) layer fill process becomes more challenging in the post-gate process. As the fill path length increases, the tungsten gates become more susceptible to voiding during deposition, resulting in the accumulation of fluorine (F) by-products, and causing fluorine attack issues. In particular, under the influence of subsequent high-temperature processes, the by-products containing fluorine can diffuse into the surrounding structure and corrode the surrounding oxide layer. This leads to WL leakage, thereby affecting device yield and reliability. This paper begins by analyzing the microscopic principles of fluorine erosion in 3D NAND. We also propose a low-pressure annealing method to address the issue of fluorine erosion. Then, we conduct the experiments on annealing planar thin film stacks and 3D filled structures under atmospheric condition and low-pressure condition. We use various methods to characterize the concentration and distribution of residual fluorine elements. The experimental results demonstrate that under appropriate conditions, the residual fluorine in the tungsten gate can be effectively released by low-pressure annealing, thus reducing the leakage index of the word line. Additionally, as the outer CH is closer to the fluorine discharge channel, the influence of low-pressure annealing on the outer CH is more pronounced than on the inner CH. The low-pressure annealing can significantly reduce the fluorine content in the tungsten gate. This method can also mitigate the issue of fluorine attack oxides and reducethe WL leakage. Using low-pressure annealing treatment can also enhance the quality of 3D NAND flash technology.
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] -
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20]
计量
- 文章访问数:1586
- PDF下载量:52
- 被引次数:0