-
脉冲神经网络(spiking neural network, SNN)作为第三代神经网络, 其计算效率更高、资源开销更少, 且仿生能力更强, 展示出了对于语音、图像处理的优秀潜能. 传统的脉冲神经网络硬件加速器通常使用加法器模拟神经元对突触权重的累加. 这种设计对于硬件资源消耗较大、神经元/突触集成度不高、加速效果一般. 因此, 本工作开展了对拥有更高集成度、更高计算效率的脉冲神经网络推理加速器的研究. 阻变式存储器(resistive random access memory, RRAM)又称忆阻器(memristor), 作为一种新兴的存储技术, 其阻值随电压变化而变化, 可用于构建crossbar架构模拟矩阵运算, 已经在被广泛应用于存算一体(processing in memory, PIM)、神经网络计算等领域. 因此, 本次工作基于忆阻器阵列, 设计了权值存储矩阵, 并结合外围电路模拟了LIF (leaky integrate and fire)神经元计算过程. 之后, 基于LIF神经元模型实现了脉冲神经网络硬件推理加速器设计. 该加速器消耗了0.75k忆阻器, 集成了24k神经元和192M突触. 仿真结果显示, 在50 MHz的工作频率下, 该加速器通过部署三层的全连接脉冲神经网络对MNIST (mixed national institute of standards and technology)数据集进行推理加速, 其最高计算速度可达148.2 frames/s, 推理准确率为96.4%.Spiking neural network (SNN) as the third-generation artificial neural network, has higher computational efficiency, lower resource overhead and higher biological rationality. It shows greater potential applications in audio and image processing. With the traditional method, the adder is used to add the membrane potential, which has low efficiency, high resource overhead and low level of integration. In this work, we propose a spiking neural network inference accelerator with higher integration and computational efficiency. Resistive random access memory (RRAM or memristor) is an emerging storage technology, in which resistance varies with voltage. It can be used to build a crossbar architecture to simulate matrix computing, and it has been widely used in processing in memory (PIM), neural network computing, and other fields. In this work, we design a weight storage matrix and peripheral circuit to simulate the leaky integrate and fire (LIF) neuron based on the memristor array. And we propose an SNN hardware inference accelerator, which integrates 24k neurons and 192M synapses with 0.75k memristor. We deploy a three-layer fully connected network on the accelerator and use it to execute the inference task of the MNIST dataset. The result shows that the accelerator can achieve 148.2 frames/s and 96.4% accuracy at a frequency of 50 MHz.
-
Keywords:
- spiking neural networks/
- resistive random access memory/
- processing in memory/
- leaky integrate and fire model/
- hardware inference accelerator
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] -
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25]
下载:
计量
- 文章访问数:7245
- PDF下载量:355
- 被引次数:0