In order to improve the driving current and suppress the SCE and DIBL effect of deep submicron SOI MOSFET, dual material gate strained Si SOI MOSFET structure with asymmetric Halo has been proposed. An impurity with a higher concentration is injected into the channel end near the source and the two materials with different work functions are put together to form the gate. By considering both the characteristics of the new device structure and the influence of strain, the flatband voltage and built-in potential have been corrected. A two-dimensional analytical model for the surface potential and the threshold voltage is proposed by solving Poisson’s equation. The effect of Ge fractions in the relaxed layer on surface potential, surface electric field, and threshold voltage is investigated. The model proposed in this paper takes into account the effects of gate metals length and their work functions. Results show that the novel device can increase carrier transport speed and suppress the SCE and DIBL effects, which provides a valuable reference to the physical parameter design.