SiGe heterojunction bipolar transistor (HBT) on thin film SOI has been successfully integrated with SOI CMOS by "folded collector". This paper deals with the collector of "partially depleted transistor" according to the thin film vertical SiGe HBT structure. A simplified circuit model including vertical and horizontal resistors and depletion capacitance is presented for the first time, and the model of the collector for field, voltage, and depletion width is systematically established. The model is analyzed with reasonable parameters. The results indicate that the space charge region consists of intrinsic junction depletion and MOS capacitance depletion, that the width of the space charge region increases with doping concentration of the collector, larger reverse junction voltage, and smaller substrate voltage, and that the region features a vertical expansion followed by a lateral expansion. This space charge region model of collector provides a valuable reference to the SiGe mm-wave BiCMOS circuit design and simulation on thin film SOI.