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本文基于海拔为4300 m的拉萨羊八井国际宇宙射线观测站, 开展了14 nm FinFET和28 nm平面互补金属氧化物半导体(complementary metal oxide semiconductor, CMOS)工艺静态随机存取存储器(static random-access memory, SRAM)阵列的大气辐射长期实时测量试验. 试验持续时间为6651 h, 共观测到单粒子翻转(single event upset, SEU)事件56个, 其中单位翻转(single bit upset, SBU) 24个, 多单元翻转(multiple cell upset, MCU) 32个. 结合之前开展的65 nm工艺SRAM结果, 研究发现, 随着工艺尺寸的减小, 器件的整体软错误率(soft error rate, SER)持续降低. 但是, 相比于65和14 nm工艺器件, 28 nm工艺器件的MCU SER最大, 其MCU占比(57%)超过SBU, MCU最大位数为16位. 虽然14 nm FinFET器件的Fin间距仅有35 nm左右, 且临界电荷降至亚fC, 但FinFET结构的引入导致灵敏区电荷收集和共享机制发生变化, 浅沟道隔离致使电荷扩散通道“狭窄化”, 另一方面灵敏区表面积减小至0.0024 μm 2, 从而导致14 nm工艺器件SBU和MCU的软错误率均明显下降.Based on the Yangbajing International Cosmic Ray Observatory in Lhasa with an altitude of 4300 m, a long-term real-time experiment is carried out in order to measure the atmospheric radiation induced soft errors in 14 nm FinFET and 28 nm planar CMOS SRAM array. The underlying mechanisms are also revealed. Five boards are used in the test, four of which are equipped with 28-nm process devices, and one board is equipped with 14-nm process devices. After removing the unstable bad bits, the actual effective test capacity is 7.1 Gb. During the test, the on-board FPGA reads the stored contents of all the tested devices in real time, reports the error information (occurrence time, board number, column number, device number, error address, error data) and corrects the error. The duration of the test is 6651 h. A total of 56 single event upset (SEU) events are observed, they being 24 single bit upset (SBU) events and 32 Multiple Cell Upset (MCU) events. Based on previous results of 65-nm SRAM, the study finds that SER continues to decrease with the reduction of process size, but the proportion of MCU in 28-nm process devices (57%) exceeds SBU, which is a process “maximum point” of MCU sensitivity, and the maximum size of MCU is 16 bits. Although the Fin spacing of the 14-nm FinFET device is only about 35 nm, and the critical charge decreases to sub-fC, the introduction of the FinFET structure leads to the change of charge collection and the sensitive volume sharing mechanism , and the shallow trench isolation leads to the narrowing of the charge diffusion channel. On the other hand, the surface area of the sensitive volume decreases to 0.0024 μm 2, resulting in a significant decrease in the soft error rate of both SBU and MCU in the 14-nm process.
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Keywords:
- FinFET/
- neutron/
- single event upset/
- soft error
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编号 SRAM工艺 型号 容量 核心电压/V 测试板编号 测试数量 封装形式 备注 1# 14 nm FinFET AG35 128 Mbit (8 M×16 bit) 0.8 4# 18只 倒装BGA 总测试容量:
7.1 Gbit
(去除坏位)2# 28 nm HKMG AH09F 64 Mbit (4 M×16 bit) 1.05 1#、2# 各19只 3# 28 nm SION AC81 64 Mbit (4 M×16 bit) 1.05 3#、5# 17只、20只 编号 TTF /h 板号 列号 器件编号 错误地址 错误数据 错误类型 开始测试 1 — 2# B 1 0x0C7A70 0x5455 SBU 2 109 3# B 2 0x06DBBC
0x06DBCC0x55D5 MCU2 3 190 5# B 5 0x02B589
0x02B599
0x02B5A90x55D5 MCU3 4 460 5# D 2 0x2CB048 0x555D SBU 5 528 3# B 1 0x3C2368 0x5D55 SBU 6 861 1# B 1 0x0B150F 0x5575 SBU 7 — 2# A 5 0x12ACC9
0x12ACD90x5455 MCU2 8 1128 1# C 1 0x3C1F74 0x5755 MCU3 0x3C1F83 0x5755 0x3C2001 0x5455 9 — 2# B 4 0x131353
0x131354
0x131363
0x1313640x7555 MCU4 10 — 2# A 1 0x040D82
0x040D83
0x040D92
0x040D930x5155 MCU4 11 1574 5# B 3 0x0B5725 0x5551 SBU 12 1583 5# C 2 0x036145 0x5554 SBU 13 1701 3# C 4 0x03BBE8
0x03BBE9
0x03BBF8
0x03BBF90x5515 MCU4 14 1728 3# C 4 0x3D4BD8
0x3D4BE8
0x3D4BF7
0x3D4BF80x7555 MCU4 15 — 2# B 3 0x201A55
0x201A650x5755 MCU2 16 — 2# C 1 0x04931E 0x5551 SBU 17 1821 3# A 2 0x01F573
0x01F574
0x01F583
0x01F584
0x01F593
0x01F594
0x01F5A3
0x01F5E60x5557 MCU8 18 1896 5# D 1 0x377B7B 0x5515 SBU 19 — 2# C 4 0x1371CB
0x1371EA
0x1371F9
0x1371FA
0x13720A
0x13721A
0x13722A
0x137237
0x137238
0x137247
0x137248
0x137257
0x137258
0x137267
0x137268
0x1372770xD555 MCU16 20 — 2# A 5 0x020319
0x0203290x55D5 MCU2 21 — 2# B 2 0x1EBD02
0x1EBD120x5545 MCU2 22 — 2# B 2 0x1AA6E8 0x5557 SBU 23 — 2# D 2 0x35DC4C
0x35DC5C
0x35DC6C0x555D MCU3 24 2336 5# C 2 0x0DB484 0x5554 SBU 25 2537 1# C 1 0x12C6AE
0x12C6AF
0x12C6BE
0x12C6BF0x5155 MCU4 26 2631 5# C 5 0x1157DD
0x1157ED
0x1157EE
0x1157FD
0x1157FE0x5575 MCU5 27 2659 5# B 4 0x27B863 0x4555 SBU 28 2898 5# D 3 0x22C4A8 0x5575 SBU 29 2909 3# C 1 0x1FC2CE 0x7555 SBU 30 3003 3# A 2 0x30B1F3
0x30B203
0x30B2130x5551 MCU3 31 — 2# C 1 0x2800CA
0x2800D9
0x2800E90x5D55 MCU3 32 — 2# A 4 0x256BB0
0x256BB1
0x256BC0
0x256BC1
0x256BD0
0x256BD1
0x256BE0
0x256BE10x4555 MCU8 33 3444 1# A 5 0x28940C
0x28941C
0x28941D0x5455 MCU3 34 3577 1# A 4 0x31B05F 0x5155 SBU 35 3586 1# B 2 0x1491E7
0x1491E80x5575 MCU2 36 3602 3# C 1 0x250F89
0x250F980x5554 MCU2 37 3705 5# B 3 0x3CAAFA
0x3CAAFB
0x3CAB0A
0x3CAB0B
0x3CAB1A
0x3CAB1B0x4555 MCU6 38 3775 5# D 1 0x2CADB4 0x5557 SBU 39 3913 3# D 1 0x3AC5DD
0x3AC5DE0x5575 MCU2 40 4191 3# B 5 0x22DEA3 0x5455 SBU 41 4216 3# D 2 0x3785ED
0x3785FD0x4555 MCU2 42 4407 1# B 2 0x361165 0x5554 SBU 43 4624 4# A 3 0x64D7B0 0x5D55 SBU 44 4652 1# A 2 0x001763
0x001754
0x0017530xD555 MCU3 45 4907 5# C 5 0x1753E9 0x5575 SBU 46 — 2# B 5 0x1A220A
0x1A220B
0x1A221A
0x1A221B0x5155 MCU4 47 5370 5# A 4 0x0AF8C1
0x0AF8D1
0x0AF8E1
0x0AF8F10x555D MCU4 48 5468 5# B 5 0x1D4987 0x5755 SBU — 3# C 5 0x0D82B0 0x5545 假SEU — 3# C 5 0x0D82B0 0x5545 49 6086 4# D 4 0x1263CA 0x4555 SBU 50 6094 5# C 5 0x3ECD72
0x3ECD820x5755 MCU2 51 — 2# D 5 0x27340D
0x27341D
0x27342D
0x27343D0x5545 MCU4 52 6244 5# C 3 0x077D9A 0x5545 SBU 53 6244.2 3# C 3 0x289097 0x5155 SBU 54 — 2# A 3 0x173626
0x1736360x5554 MCU2 55 6248.2 5# B 5 0x177AE1 0x5155 SBU 56 6390.2 5# C 4 0x04619D
0x0461BC0x7555 MCU2 6651.2 试验结束 区域类别 参数 衬底厚度/nm 100 栅极长度/nm 26 栅氧层厚度/nm 1.35 Fin高/nm 45 Fin宽/nm 14 掺杂类别 区域 掺杂浓度/(1016cm–3) 均匀掺杂 衬底 1.0 (掺硼) 沟道 1.0 (掺硼) 高斯掺杂 漏区 10000.0 (掺磷) 源区 10000.0 (掺磷) -
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28]
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