The insulated gate bipolar transistor (IGBT) has developed rapidly as a key power device for medium power application since it was first introduced. It is well known for its relatively low conduction loss and easy gate control. The IGBT is commonly seen in the inductive load application circuit. Due to the large inductive load, the current of the IGBT will stay high until the voltage rises to the bus voltage during the IGBT turn-off. After that, the current starts to decrease and IGBT goes into the tail-current procedure withstanding high voltage. When evaluating the turn-off loss of IGBT, the fall time and the tail current are commonly taken into consideration because these two features are known as good representations of power loss during tail-current procedure. However, the power loss occurring during the voltage rise, which is usually neglected, can also be a significant contributor to the total turn-off loss. The dv/dt determines the voltage rise time and the power loss during this procedure. Thus, predicting the dv/dt is essential for evaluating the power loss during the IGBT turn-off. In this paper, the turn-off transient is divided into four stages and the physical mechanism which determines the dv/dt during the turn-off transient is carefully investigated. An analytical model to characterize the dv/dt during IGBT inductive turn-off is derived based on the calculated miller capacitance values. The functions of the miller capacitance and the dv/dt against time are presented to predict the collector voltage waveform during the IGBT turn-off. To make the model more accurate, the current dependence is considered when calculating the miller capacitance as well as the voltage dependency. The derived model shows that the dv/dt increases nonlinearly with the time going by and can be influenced by several factors, including the drive circuit conditions, the collector current and the carrier concentration profile in the ON-state. Further investigation indicates that the ON-state carrier concentration is greatly influenced by the IGBT cell structure. Thus, the model presented in this paper is effective in both the estimation of IGBT turn-off loss and the guidance of device structure design. The prediction of the derived model shows good agreement with the two-dimensional numerical simulation by Sentaurus TCAD (with the relative error not exceeding 10%) for the IGBT turn-off over a broad range of the collector current values. The device structure simulated in this paper is based on the 650 V/60 A trench-FS-IGBT. The thickness values of the total structure and the buffer layer are 80 m and 20 m, respectively.