Base on the lumped resistance-capacitance （RC） tree power model，a novel distributed interconnect dynamic power analytical model was proposed，which considers the effect of non-uniform temperature distribution along the interconnect. The new model overtakes the defect that the lumped model cannot represent the effect of non-uniform temperature distribution on the resistance of interconnect，and estimates the total power consumption of RC tree under a non-ideal unit step input. The proposed model is used to calculate the total power consumption of interconnect under nanometer-scale complementary metal-oxide semiconductor （CMOS） typical process. The results show that the longer the interconnected line is，the greater the effect of non-uniform temperature distribution on the power consumption is，and the dynamic power per unit length keeps constant under different processes. The proposed model can accurately calculate the dynamic power of interconnects，thus can be used to optimize design of large scale interconnect router and clock network in network-on-chip structure.